Writing a digital signal synthesis array driver in Go

About me

2011: started web development¹
2013: wrote a websocket libary²
2014: wrote my own online store ^2,3
...
2015: wrote a OpenCV backend for retinal aneurysm detection ³
2016: implemented some computer vision papers ⁴
2018: wrote a device driver for a digital signal synthesis array driver ³

Many body quantum optics

Vacuum apparatus

Ultracold Atoms Group at the University of Washington, USA.

Optical lattice

Atomic, Molecular, and Optical Phsyics Group at the University of Marryland, USA.

Acousto-optics

Elent Technics

Digital signal synthesis

RF signals

Simple architecture

Synthesis

Advanced architecture

Clock generation

Parameters

Parameter	Related Register	Register Bits	Values
System Clock¹	Multiplier (N)	7	100 MHz to 1 GHz
Frequency^1,2	Frequency Tuning Word (FTW)	32	1 Hz to 420 MHz
Amplitude^1,3	Amplitude Scale Factor (ASF)	14	0 to 100 %
Phase¹	Phase Offset Word (POW)	16	0 to 2π

¹ for the AD9910
² 10 MHz reference clock signal
³ relative to full scale output

Connection

Implementation

Requirements

can run on linux
reproducible builds
enforce code style
static types

Libraries

Web Service: echo
Command: kingpin
Hardware: periph.io

Architecture

Shell


              dds --select 1 const --frequency 100e6
              dds --select 1 sweep --param frequency --start 90e6 --stop 110e6

Python


              import control

              // constant frequency at 100% amplitude
              control.aod_h(frequency=100e6)

              // frequency sweep from 90e6 to 110e6
              control.aod_h(frequency=[90e6, 110e6])

              // frequency sweep from 90e6 to 110e6 with custom amplitude values
              control.aod_h(frequency=[90e6, 110e6], amplitude=[0.1, 0.4, 0.5, 1.0])

Summary

What were the challenges of this project?
Were there any Go relevant problems?
How was the library support?

Thank you

Link to repository